board in the slave chassis. Only noninterrupter slave boards
are allowed in the slave chassis.
The link between the master chassis and slave chassis is
automatically established when a VMEbus master (typically
a CPU board) addresses any board in the slave chassis.
Any time a master in the master chassis issues a VMEbus
read/write cycle it will be repeated to the slave chassis. If a
slave board in any slave chassis responds to that address, the
data transfer (read or write) will occur between the chassis
and a Data Transfer Acknowledge (DTACK) will be
generated to the master (in master chassis) to complete the
cycle.
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